1. Field of the Invention
The present invention relates generally to a capacitor sheet, a method for producing the same, a circuit board, and a semiconductor device, and particularly to a capacitor sheet having an improved structure suitable for mounting a semiconductor on a wiring board such as a mother board or a daughter board.
2. Related Background Art
Recently, the digitalization of circuits has been promoted in electronic apparatuses, which significantly accelerates higher-speed information processing, further size reduction, and the integration of a multiplicity of functions. This requires circuit boards to be capable of accommodating high-density circuit and mounting high-density component, so as to cope with an increase in the number of semiconductor components.
In response to the demand for high-density circuit accommodation, multilayer wiring boards having an inner via hole structure for all layers (xe2x80x9cALIVHxe2x80x9d (a trademark of Matsushita Electric Industrial Co., Ltd.) structure), built-up wiring boards, etc., have been developed recently and put into practical application. Besides, as to the high-density component mounting, the technique of configuring semiconductor packages in the ball grid array (BGA) form or in the chip size package (CSP) form has been developed, whereby areas for mounting and spaces between components can be reduced considerably. Furthermore, to mount components at a further higher density, a technique of providing built-in by-pass capacitors indispensable for operations of a semiconductor inside a board, etc., has been developed.
For instance, JP 5(1993)-36857 A teaches an example in which by-pass capacitors, each of which is composed of a first conductive electrode layer, a second conductive electrode layer and a dielectric layer interposed between the foregoing two conductive electrode layers, are placed on a substrate made of silicon (Si), aluminum nitride (AlN), or the like, and a multilayer wiring layer composed of a wiring layer, an insulation layer, and the like is laminated further thereon. With this structure, semiconductor chips mounted on a surface of the lamination board and the by-pass capacitors incorporated therein are connected with each other through vias. Therefore, unlike a conventional configuration with surface-mounted chip capacitors, areas on which chip capacitors are mounted and wiring areas for connection are unnecessary on the surface of the board. This allegedly allows the degree of freedom in the arrangement of mounted components and the wiring to increase significantly, thereby allowing the high-density packaging to be implemented.
Recently, the frequencies of used signals also have been increased as integrated circuits such as ICs and LSIs have higher processing speeds and greater capacities. This leads to a problem in that switching noises generated in packages having integrated circuits built therein cause malfunctions.
In high-speed, large-capacity LSI packages conventionally used, multilayer structures in which power source layers and grounding layers are formed alternately is employed to maintain the electric characteristics thereof Besides, a multiplicity of chip capacitors as decoupling capacitors are mounted in the vicinity of a LSI of the package board or a back face of the same.
On the other hand, there is a tendency to operate a CPU at a low voltage with large current to achieve lower power consumption, and this leads to a problem in that the power supply is insufficient upon the start-up of the CPU, thereby impairing the operability. In conventional cases, to stabilize the power supply upon the start-up, an electrolytic capacitor with a large capacity is provided in the vicinity of the LSI.
Thus, it is significantly effective to provide built-in capacitors inside a board so as to achieve high-density packaging. However, this results in a wiring layer being provided immediately under a face where a component is mounted, and a capacitor layer is formed therebeneath, which means that capacitors are connected through vias that pass through several insulation layers. Therefore, there is apprehension that the inductances of the vias adversely affect the intended stabilization of the power supply.
It is an object of the present invention to provide a capacitor sheet configured so that the electric connection for employing capacitors and the electric connection between faces of the sheet are independent from each other and adverse effects of inductances of vias are eliminated, as well as a method for producing the capacitor sheet. It is also an object of the present invention to provide a board with built-in capacitors in which the foregoing capacitor sheet is employed, and a semiconductor device in which the foregoing capacitor sheet is employed.
A capacitor sheet of the present invention includes a laminate sheet, an interface-connection feedthrough conductors for electrically connecting faces of the laminate sheet, and capacitor-connection feedthrough conductors. The laminate sheet has at least one laminate that is composed of a power source layer electrode, a grounding layer electrode, and a dielectric layer interposed between the power source layer electrode and the grounding layer electrode. The interface-connection feedthrough conductors are formed in through holes that pass through the dielectric layer, the power source layer electrode, and the grounding layer electrode, and are insulated by insulation walls from the power source layer electrode and the grounding layer electrode provided inside. The capacitor-connection feedthrough conductors are formed in regions where only either the power source layer electrode or the grounding layer electrode is provided, and are connected electrically with either the power source layer electrode or the grounding layer electrode.
This configuration makes the electric connection for employing the capacitors and the electric connection between the faces of the sheet independent from each other. It should be noted that the number of the foregoing laminates normally is approximately 2 to 100, but the number may be more than 100 when necessary.
A method for producing a capacitor sheet according to the present invention is a method for producing the foregoing capacitor sheet, and a step thereof for forming the interface-connection feedthrough conductors include the sub-steps of forming large-diameter perforations in the laminate sheet, filling an insulator in the large-diameter perforations, forming small-diameter perforations in the large-diameter perforations filled with the insulator, and providing feedthrough conductors in the small-diameter perforations.
A board with built-in capacitors according to the present invention is a board in which the above-described capacitor sheet is laminated. In the foregoing board, printed circuit boards laminated on both faces of the capacitor sheet are connected electrically with each other via the interface-connection feedthrough conductors, and connection between the power source layer electrode and the grounding layer electrode of the capacitor sheet is achieved by the capacitor-connection feedthrough conductors.
The foregoing configuration in which the multilayer lamination capacitor is employed makes it possible to increase the capacity for power supply. Besides, by dividing the multilayer lamination capacitor into predetermined capacitances and arranging the same, it is possible to apply the same to various functions. Furthermore, since this configuration allows capacitors to be built as arbitrary layers, the capacitor layer can be formed immediately under a mounted component, or in other words, in an outermost layer of the board, thereby allowing the via connection with capacitors to be minimized in length. This makes it possible to suppress the influence of inductances of vias to a minimum degree, thereby allowing the stabilization of power supply to be achieved more effectively. Furthermore, the provision of vias that pass through a capacitor layer so as to be connected with a layer beneath the same enables wiring connection in internal layers with a higher degree of freedom, thereby facilitating the designing.
A semiconductor device of the present invention includes a resin multilayer board with signal wiring layers formed on and inside the same, the above-described capacitor sheet provided and connected in the resin multilayer board, and a semiconductor chip mounted on the resin multilayer board by flip chip mounting. Alternatively, it may be configured to include a semiconductor chip carrier mounted on the resin multilayer board, in place of the semiconductor chip.
Furthermore, a semiconductor device of the present invention includes a resin multilayer board with signal wiring layers formed on and inside the same, the above-described capacitor sheet provided and connected in the resin multilayer board, and a semiconductor chip mounted on the capacitor sheet by flip chip mounting. Alternatively, it may be configured to include a semiconductor chip carrier mounted on the capacitor sheet, in place of the semiconductor chip.